unit, which, because it contains the instruction register and pro-
gram counter, is the rudder of the CPU.
The Branch Instruction as a Special Type of Load
Recall that an instruction fetch is a special type of load that happens auto-
matically for every instruction and that always takes the address in the program counter as its source and the instruction register as its destination. With that in mind, you might think of a branch instruction as a similar kind of load,
but under the control of the programmer instead of the CPU. The branch
instruction is a load that takes the address specified by #target as its source
and the instruction register as its destination.
Like a regular load, a branch instruction can take as its target an address
stored in a register. In other words, branch instructions can use register-
relative addressing just like regular load instructions. This capability is useful because it allows the computer to store blocks of code at arbitrary places in
memory. The programmer doesn’t need to know the address where the
32
Chapter 2
block of code will wind up before writing a branch instruction that jumps to
that particular block; all he or she needs is a way to get to the memory
location where the operating system, which is responsible for managing
memory, has stored the starting address of the desired block of code.
Consider Program 2-3, in which the programmer knows that the
operating system has placed the address of the branch target in line 17 in
register C. Upon reaching line 17, the computer jumps to the address stored
in C by copying the contents of C into the instruction register.
Line
Code
Comments
16
sub A, B, A
Subtract the number in register A from the number in register B and
store the result in A.
17
jumpz #C
Check the PSW, and if the result of the previous instruction was
zero, jump to the instruction at the address stored in C. If the result
was nonzero, continue on to line 18.
18
add A, 15, A
Add 15 to the number in A and store the result in A.
Program 2-3: A conditional branch that uses an address stored in a register
When a programmer uses register-relative addressing with a branch
instruction, the operating system must load a certain register with the base
address of the code segment in which the program resides. Like the data
segment, the code segment is a contiguous block of memory cells, but its
cells store instructions instead of data. So to jump to line 15 in the currently running program, assuming that the operating system has placed the base
address of the code segment in C, the programmer could use the following
instruction:
Code
Comments
jump #(C + 30)
Jump to the instruction located 30 bytes away from the start of the code
segment. (Each instruction is 2 bytes in length, so this puts us at the 15
instruction.)
Branch Instructions and Labels
In programs written for real-world architectures, branch targets don’t usually
take the form of either immediate values or register-relative values. Rather,
the programmer places a label on the line of code to which he or she wants to jump, and then puts that label in the branch’s target field. Program 2-4
shows a portion of assembly language code that uses labels.
sub A, B, A
jumpz LBL1
add A, 15, A
store A, #(D + 16)
LBL1: add A, B, B
store B, #(D + 16)
Program 2-4: Assembly language code that uses labels
The Mechanics of Program Execution
33
In this example, if the contents of A and B are equal, the computer will
jump to the instruction with the label LBL1 and begin executing there,
skipping the instructions between the jump and the labeled add. Just as the
absolute memory addresses used in load and store instructions are modified
at load time to fit the location in memory of the program’s data segment,
labels like LBL1 are changed at load time into memory addresses that reflect
the location in memory of the program’s code segment.
Excursus: Booting Up
If